1. Field of the Invention
The present invention relates to a microprogram-controlled unit, more specifically to a method of error detection and correction for microinstructions in a unit operated by microprograms, such as a so-called pipeline processor.
2. Description of the Prior Art
An error checking code (ECC) is usually added to each microinstruction to be stored in a control storage of a microprogram-controlled unit to increase microinstruction reliability. When decoded, the ECC make it possible to check whether the microinstruction is correct or includes an error. Conventionally, the ECC decoding operation is effected in parallel with the execution of the microinstruction read from the control storage. This is because it takes a relatively long time to decode the ECC. Sequential operation of the ECC decoding operation and execution of the microinstruction would therefore adversely affect the operation speed of the microprogram-controlled unit.
During the parallel ECC decoding operation and microinstruction execution, detection of any error immediately stops the execution of the erroneous microinstruction. The microinstruction is then corrected and reexecuted in a "retry" operation. If the error is in a fixed bit in the control storage, however, the above process is repeated each time the microinstruction including that erroneous bit is specified. This reduces the efficiency of the microprogram-controlled unit. This problem is particularly severe in a pipeline processor. In such a processor, a plurality of microinstructions are executed simultaneously. Therefore, the retry operation must include not just the erroneous microinstruction, but a few of the microinstructions which preceded the erroneous microinstructions.